I have been a supporter, if not an outright cheerleader, of RISC-V, the open source instruction set architecture (ISA). In my writings here on Interconnected and elsewhere, I’ve often used RISC-V as an example of technological innovation, broadly, and an antidote to countries seeking self-reliance in semiconductor technology, specifically. Indeed, RISC-V has become an increasingly prominent piece of the industrial policies in China, India, and Pakistan to name just a few countries.

While I still firmly believe in RISC-V’s long-term potential, how valuable or pivotal it really is in helping a country achieve self-reliance is rather questionable. So time to update my own thinking with a more bearish, sobering, and less cheerlead-y take on RISC-V.

Weak Software Ecosystem

RISC-V isn’t the first open source ISA. Previously projects, like OpenRISC and OpenSPARC, have all fallen out of relevance largely because there was no software ecosystem to support their growth.

RISC-V is facing the same predicament.

Herein lies an important observation: as core as an ISA may be in the entire semiconductor production chain, it’s too small a piece of the puzzle to make a big difference alone. Borrowing an analogy from an entrepreneur friend: an open source ISA is more like the English grammar -- it’s free and open to anyone but inherently not that valuable. What’s valuable is the great novels, research, legal contracts, business negotiations, etc. done using English that’s valuable. And for that to happen, you need enough people to read, write, and speak English.

Similarly, the production silicons (actual chips that can be deployed in devices, the “novels” of the ecosystem) is what will make RISC-V valuable, not its nature of being an open source ISA. Sadly, RISC-V isn’t at that level yet, because not enough developers “speak” RISC-V. Thus, it’s not surprising that there is no volume production of RISC-V-based chips, despite the enthusiasm and promise surrounding the technology.

To be sure, the RISC-V International foundation is working hard to foster that ecosystem. More compilers (the software layer that translates code, like C, into machine instructions for a chip to execute) are also being supported -- a critical software layer necessary to draw more developers into the project. But building a developer ecosystem that spans both hardware and software is a difficult undertaking -- a long-haul that’s a constant chicken-or-egg exercise. And even if a sustainable ecosystem is achieved, that’s just the first of many steps to justify to the market that producing RISC-V silicons at scale is worthwhile. RISC-V is still in the early days of that long journey.

Technical Raison d'être

All the geopolitical tension has shoved RISC-V into the limelight, so much so that we forget its technical raison d'être, which is important to know, ironically, in order to put RISC-V in its proper role in the current geopolitical context.

One of the core purposes of RISC-V is to push innovation in a new way as Moore’s Law reaches its limit. Moore’s Law, put simply, is the observation that the number of transistors you can fit on a chip doubles every two years. As that doubling reaches its limit (everything has a limit), the next big challenge is: what functionalities can we still squeeze out of this form factor to keep innovation going until the next paradigm, i.e. quantum computing, matures.

RISC-V lets chip designers do that “squeezing” and customizing by being simple (or reduced, as in the “R” in RISC) and free (because it’s open source, thus no licensing fees or constraints). This “free simplicity” is crucial, because it enables quick and economical experimentation to make custom-purpose chips that can squeeze in specific functionalities, while stripping away unnecessary ones (which you’d often find in general-purpose chips). For example, a security camera that needs to do facial recognition only needs a chip that can process computer vision models well, i.e. lots of matrix multiplication, and send an alert if it detects a problem -- nothing else. Because of this ability to customize, chips designed the RISC-V way also tend to consume less power.

Thus, RISC-V’s technical motivation fills an important purpose in the larger semiconductor ecosystem, but can’t (and shouldn’t be expected to) replace the general-purpose ISAs, Intel’s x86 and Arm.

The possibility of ISAs being sanctioned is also quite remote. Even with the pending Nvidia-Arm acquisition, which will make both dominant ISAs “American” soon, the ISA part is too small on a macro-level and isn’t a real bottleneck of advancement. Sanctioning ISAs just to keep China down, especially given Intel’s poor shape, may do more harm than good to American industries. The Semiconductor Industry Association, the industry’s lobbying arm in DC, has already criticized previous rounds of sanctions on Huawei.

The real chokeholds are: 1. EDA software suites to design chips based on a given ISA, most of which are proprietary software; 2. Advanced lithography equipment that can take those designs and etch them onto the smallest chip Moore’s Law would allow, most of which are provided by only a handful of vendors worldwide, like ASML and Applied Materials. These two parts are also easier to sanction from an execution standpoint than ISA intellectual properties. (See my previous post on how another RISC-based ISA, MIPS, ended up in China via offshore entities and a bankruptcy.)

Are Nvidia+Arm, AMD+Xilinx Catalysts?

All my bearish, critical thoughts aside, RISC-V actually has a historical opportunity in front of it. The industry is going through a massive consolidation phase, and two big players, Arm and Xilinx, are being acquired by Nvidia and AMD, respectively.

Arm is the RISC-based ISA that has basically monopolized the mobile industry, and Nvidia is one of its many customers. With Nvidia owning Arm, all of Arm’s other customers, many of whom compete with Nvidia, will have to consider other options. RISC-V is the obvious, if not the only, alternative. Xilinx is a leading provider of FPGAs (Field Programmable Gate Arrays), which are programmable chips that have similar flexibility characteristics as RISC-V chips (so some competition here too), but are more expensive and power-consuming. They are used in high-end equipment, such as satellites and some 5G base stations. FPGA and RISC-V cores can also exist on the same system-on-a-chip (SoC), like this PolarFire SoC from Microchip:

Microchip's FPGA + RISC-V PolarFire SoC

The lane that the Nvidia-Arm deal opens up for RISC-V is plain as day. And I’m not the first, nor will be the last, to prognosticate about this opening. Whether the AMD-Xilinx deal will also be an opening is too early to tell. The impact of both deals, at large, will take years to play out.

But one thing is certain: if you are looking for a neutral source of IP that doesn’t have any potential conflict of interest, a “Switzerland”, RISC-V might be your only bet. (Not to mention, the RISC-V International foundation is literally registered in Switzerland.)

The question now is: can RISC-V seize this moment and avoid the fate of the other open source ISAs that came before it?

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我一直很支持RISC-V,它是一款开源的芯片指令集架构 (instruction set architecture, ISA),甚至有时候觉得自己像它的“拉拉队”。我在Interconnected上其他地方写的文章中,经常把RISC-V不仅仅看作一个技术创新的例子,还看作寻求半导体技术自力更生的国家们的“救星”。RISC-V已经成为中国、印度和巴基斯坦等国的工业政策中越来越重要的一部分。





在这里我们可以总结出一个重点:尽管ISA在整个半导体生产链中是个核心部分,但它在整个“拼图”中的地位太小,单独来看其实没有那么大的影响力。借用一位创业朋友的比喻:开源的ISA更像英语语法 -- 对任何人都是免费开放的,但本质上没有那么大的价值。有价值的是用英语写出来的伟大小说、研究报告、法律合同、商业谈判等,它们才有价值。要做到这一点,就需要有足够的人去读、写、说英语。

同样,生产级硅片(可以部署在设备中的芯片,整个生态里的 "小说")才是体现出RISC-V价值的地方,而不是它的开源本质。遗憾的是,RISC-V目前还没有达到这个水平,还没有足够多的开发者 "会说" RISC-V。因此,尽管围绕着RISC-V技术的热情越来越高,基于RISC-V的生产级芯片还没达到量产,这也不足为奇了。

当然,RISC-V基金会正在努力地培养这个生态。更多的编译器 (把代码,如C,翻译成机器指令供芯片执行的软件层) 也开始得到支持 -- 这是吸引更多开发者参与到项目里必需的软件层。但是,建立一个横跨硬件和软件的开发者生态是一项艰巨的任务;是一个不断要做“鸡生蛋,还是蛋生鸡“的长期过程。况且,即使打造出了一个可持续发展的生态,也仅是向市场证明基于RISC-V的硅片值得大规模生产的第一步。RISC-V仍处于这一漫长旅程的早期。



RISC-V存在的核心目的之一,就是在摩尔定律达到极限的时候,以一种新的方式推动创新。摩尔定律,简单来说,讲的就是一块芯片上可以容纳的晶体管数量每两年会翻一番。当这一翻倍达到极限时 (任何事物都有极限),下一个大的挑战就是:我们还能从这一形式中挤出多少新的功能来保持科技创新,直到下一个形式的成熟,即量子计算

RISC-V通过简单(或简化,RISC中的 "R" 就是“reduced”)和免费(它是开源的,因此没有许可费或条约限制),让设计芯片的工程师可以“挤出”和定制他们需要的功能。这种 "免费的简单性 "是至关重要的,因为它允许快速而经济的试验,以制造出多种多样的“专用芯片”,同时去掉不必要的功能(“通用芯片”中一般有很多不必要的功能)。举个例子:一个需要做面部识别的安防摄像头,只需要一个能很好地处理AI计算机视觉模型的芯片,即大量的矩阵乘法,如果察觉到什么问题,能发出警报就可以了,其他功能都是多余的。因为可以灵活地定制,以RISC-V方式设计出的芯片也往往功耗较低。


ISA被制裁的可能性也相当小。即便Nvidia即将收购Arm,让主导整个半导体行业的两款ISA都变成 "美国的",ISA这一块从宏观视角来看比重还太小,不会成为科技发展的真正瓶颈。如果仅仅为了压制中国半导体发展而制裁ISA,尤其是在英特尔目前状态极不景气的情况下,对美国的产业可能弊大于利。这个行业在华盛顿的游说团,半导体工业协会,已经公开批评了前几轮对华为的制裁。

真正的两大瓶颈是:1. 基于某款ISA来设计芯片的EDA软件套件,绝大部分都是专利软件;2. 先进的光刻设备,可以把用EDA做出来的设计蚀刻到摩尔定律允许的最小芯片上的那种,大多由全球少数几家厂商提供,如ASML和Applied Materials。从具体操作角度来看,制裁这两部分也比在ISA知识产权上施压要容易得多。(感兴趣的读者可以读我前一阵子写的一篇文章,关于另一款基于RISC的ISA,叫MIPS,是如何通过各种离岸实体和一次破产而流入到中国的)。



Arm是基于RISC的一款ISA,基本上垄断了整个移动设备行业,Nvidia是其众多客户之一。随着Nvidia对Arm的收购,Arm的所有其他客户(其中很多是Nvidia的竞争对手)将不得不考虑其他选择。RISC-V是一个选择,甚至可能是唯一一个选择。Xilinx是FPGA (Field Programmable Gate Arrays) 的领先供应商,FPGA是一种可以编程的芯片,与RISC-V的灵活特性类似 (所以也是某种程度上的竞品),但它价格更贵,功耗更大。FGPA通常被用于高端设备,如卫星和一些5G基站。FPGA和RISC-V内核也可以在同一块系统级芯片(Systems on a chip,SoC)上同时运作,比如Microchip的这款PolarFire SoC。

Microchip's FPGA + RISC-V PolarFire SoC


但有一点是肯定的:如果一家公司需要一个中立的ISA IP,没有任何潜在的利益冲突,所谓的"瑞士",RISC-V可能是唯一的选择。(更何况,RISC-V国际基金会就注册在瑞士。)